Build the silicon brain of the next computing era | VP of Engineering, IC Design | Lead chip teams at Ixana
West Lafayette, IN (In Office)Full-time
About Ixana
Ixana is a Purdue University spinoff pioneering brain-inspired wearable computing. We've developed Wi-R, a patented communication tech that's 100x more energy-efficient than Bluetooth or Wi-Fi. Join our 60-person team building the next era of real-time, AI-powered human-computer interaction.
We provide relocation packages and visa transfer support (if required) for candidates based in the San Francisco Bay Area and other major U.S. hubs.
The Wi-R Revolution
Wi-R is our patented non-radiative near-field communication technology that creates secure "wire-like wireless" experiences through small E-field bubbles around your body. This breakthrough enables unprecedented energy efficiency at sub-0.1 nanojoules per bit, making long-term wearable and implantable devices finally practical.
See Wi-R in Action: High-speed data, transferred through skin contact -
What You’ll Do
●Lead and grow a world-class IC design team across analog, mixed-signal, RF, and digital domains
●Own the end-to-end chip lifecycle-from concept to GDSII to bring-up and production
●Set architectural direction and technical standards across IC design projects
●Work cross-functionally with hardware, firmware, and product teams to translate chip performance into real-world applications
●Guide vendor/EDA tool engagement, IP integration, and tapeout execution
●Hire, mentor, and retain exceptional engineering talent
●Represent engineering in executive strategy discussions and technical partnerships
What We’re Looking For
Required:
●10-20 years of experience in analog and mixed-signal IC design
●Demonstrated leadership in taking chips from first spec to high-yield production
●Deep expertise in design for low-power, wireless, or wearable applications
●Experience leading and scaling high-performance engineering teams
●Strategic thinker with a hands-on approach to solving engineering challenges
Preferred:
●Tapeout experience in startups or product-first environments
●Familiarity with system-level design and integration including firmware/hardware co-design
●Strong communication and stakeholder management skills
●A track record of mentorship and team development
Compensation & Benefits
●Base Salary: $180,000 - $250,000 per annum ≈ $340k - $480k Bay Area equivalent after cost of living